The miniaturization of these systems in order to increase the integration density is pushing the electrical properties of these components to their limits. In the case of capacitors, the parallel aim of the miniaturization is to maintain the insulating capacities of the dielectric. The capacitors are generally used for temporarily storing a value, or bit, in the form of a charge which is present or absent. It is therefore crucial that the state of charge can persist for a sufficiently long time in relation to the information processing times.
During miniaturization, the surface occupied by a capacitor decreases, the direct effect of which is that the value of the capacitance associated with it is reduced. In order to keep the capacitance at an acceptable value, either the relative permittivity of the oxide may be increased or the contact surface between the electrodes may be increased. Studies carried out during the miniaturization of transistors have revealed a vast range of materials with a high dielectric constant. These materials, however, present great integration difficulties.
Examples which may be mentioned among these high dielectric constant materials are tantalum oxide Ta2O5 “Journal of The Electrochemical Society, 153 (5) G492-G497 (2006)”, or yttrium oxides “J. Vac. Sci. Technol. A 24(3) (2006)”.
In parallel with this, increasing the contact surface has been investigated and several ways have been proposed in which the contact surface between a dielectric and metal electrodes can be increased. A common feature of these methods involves increasing the roughness of the lower electrode in conjunction with conformally depositing the dielectric and the upper electrode.
Mention may be made of hemispherical silicon grains, obtained by vapour deposition of amorphous silicon at a temperature at least equal to 550° C. followed by recrystallization at the same temperature. Depending on the surface density of these hemispherical silicon grains, the increase in free surface for a constant occupation surface may reach a factor of two, according to document “J. Appl. Phys. 71 (7), 1 Apr. 1992”.
Document “Journal of The Electrochemical Society, 148 (8) F170-F174 (2001)” discloses other conditions for producing an electrode comprising hemispherical silicon grains, in particular by using ozone.
Another method for generating roughness capable of increasing the contact surface of the dielectric consists in the use of a micromasking effect during reactive ion etching.
Micromasking consists in redepositing some of the ions coming from the plasma in the form of carbon polymers. These polymers then fulfil the function of a mask for the subsequent etching steps. The deposited polymer film does not have a uniform thickness. The etching time of the polymer film varies with the thickness. Silicon and the polymer film have different etching rates. Thus, when all the polymer at a given point has been etched, the etching continues in silicon at a higher rate. The thickness difference of the polymer film is thus amplified when etching the silicon layer. Furthermore, if the reactive ion etching has a pronounced chemical nature, i.e. if the etching is isotropic, then etching in the silicon is accompanied by lateral undercut etching capable of rounding the reliefs. The thickness inhomogeneities of the polymer film are thus converted into hemispherical shapes and not into columns, as expected in the case of anisotropic etching. The term chemical nature of the etching is intended to mean etching in which the reactions of the ions coming from the plasma with the materials to be etched are predominant over impact of the accelerated ions with the materials to be etched.
Documents “Journal of Vacuum Science Technology B 8(6) 1990” and “Journal of Vacuum Science Technology B 10(6) 1992” describe a micromasking effect obtained when etching silicon by reactive ion etching using a plasma originating from halides in gaseous form. The micromasking is exhibited only with certain combinations of materials to be etched, temperature, pressure, energy of the plasma, charge of the substrate, form factor and nature of the precursors of the plasma.
Hemispherical silicon grains are obtained in both cases, the surface density and size of which are controlled by the production conditions. The roughness thus induced makes it possible to increase the contact surface between the dielectric and the metal electrodes.
Lastly, another approach consists in combining a high dielectric constant material and roughness at the interface between the dielectric and the metal electrodes.
Document “J. Vac. Sci. Technol. B 19(1) (2001)” describes the use of a (Ba,Sr)TiO3 dielectric film coupled with (Ba,Sr)RuO3 electrodes. The (Ba,Sr)TiO3 film has a high extinction coefficient. The extinction coefficient corresponds to the complex part of the refractive index and is directly related to the dielectric constant. In the cited document, the (Ba,Sr)RuO3 electrodes undergo annealing which generates surface roughness capable of increasing the contact surface between the dielectric and the electrodes.
These methods present the drawback of a large heat budget, making the process difficult to integrate for the production of interconnection lines in microelectronic devices, for example memories of the DRAM type, particularly owing to the risk of deactivating the dopants used in transistors having a gate length of less than 90 nm. These methods also present the drawback of large sizes, greater than the dimensions of several capacitive devices, or nonuniform curvature compromising reproducibility and reliability from one device to another.